1. Technical Field
The disclosed embodiments relate to the testing of integrated circuits.
2. Background Information
Printed Circuit Boards (PCBs) may contain several Integrated Circuit (IC) components, where each component may have hundreds of Input and Output (I/O) terminals. These components may also be attached to the printed circuit boards in a manner that makes it difficult to examine and test electrical connections to each component and the connections from one component to another. Automated test methods and systems exist for testing printed circuit boards and ensuring the robustness of electrical connections made during the manufacture of these systems.
IEEE Standard 1149 from the Institute of Electrical and Electronics Engineers (IEEE) is a standard that specifies one such test system. The 1149 standard is commonly referred to as “JTAG” (Joint Test Action Group). The 1149 standard specifies communication between Automated Test Equipment (ATE) systems and integrated circuit components. An 1149 standard compliant component contains Test Access Ports (TAP), a TAP controller, and instruction and data registers. The ATE system issues instructions to the TAP controller of a component so that the ATE system is able to provide stimulus data to the component and is able to receive and capture test data output from the component. Data provided to a component from the ATE system is typically shifted into the boundary scan register. The boundary scan register is a type of data register within the component. The ATE system can also receive data from the component by shifting out the contents of the boundary scan registers within the component. An ATE system may use various techniques for loading data into and reading data out of an IC component on a PCB.
Such loading of data into and reading data out of a data register can be accomplished by first shifting out previously stored data and then subsequent loading of the data register by shifting new data into the data register. If previously stored data exists in the data register of a component, the ATE system may shift out the data in the boundary scan register by sending instructions to the TAP controller of a component via test access terminals and then subsequently clocking the Test Clock (TCK) terminal until all previously stored data has been shifted out of the boundary scan register and is stored within a memory storage device within the ATE system. Once the data is received by the ATE system, the ATE system modifies all or a portion of the data and stores it before shifting that data back into the component's boundary scan register. The ATE system then takes this modified data and loads it back into the boundary scan register by issuing instructions to the component's TAP controller and clocking the TCK terminal. This process is repeated until testing of the PCB is complete.
Another method of testing an IC device is accomplished by storing several patterns of data within a memory storage device of an ATE system and simultaneously shifting out previously stored data within the component's data register and shifting in the next pattern of data. The ATE system issues instructions to the TAP controller of the component and causes data to shift out of the boundary scan register and as the previously stored data is shifted out of the boundary scan register, the next data pattern is provided at the input of the boundary scan register. As previously stored data is shifted out of the component's boundary scan register, the ATE device causes the data from the next data pattern to be loaded into the boundary scan register. When the existing data is completely shifted out, the next data pattern is already shifted into the boundary scan registers. This process is then repeated until testing of the PCB is complete.
A proposal by the Institute of Electronic and Electrical Engineers (IEEE), the P1687 standard (commonly referred to as IJTAG), is a proposed test standard that includes more integrated circuit or component level test features. Data registers as specified by the proposed P1687 standard are dynamically configurable. This allows testing of selected portions of an integrated circuit Device Under Test (DUT). During some IJTAG test operations, it may be necessary to modify a data value within a single selected register or within a selected subset of registers. The IJTAG standard may require some instructions to modify only the data values within a selected register or group of registers and to leave data values in all other registers unaltered. Improved methods of preloading and sampling of the data registers of a P1687 compliant system are desired.